The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2023
Filed:
Jul. 25, 2022
Applicant:
Nvidia Corp., Santa Clara, CA (US);
Inventors:
Walker Joseph Turner, Jacksonville, FL (US);
John Poulton, Chapel Hill, NC (US);
Sanquan Song, Mountain View, CA (US);
Assignee:
NVIDIA CORP., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018528 (2013.01); H03K 3/037 (2013.01); H03K 19/018521 (2013.01);
Abstract
Voltage level conversion circuits include PMOS pull-down devices or NMOS pull-up devices, and inverters with outputs that determine gate voltages of these devices. The inverters are powered by moving supply voltages, for example complementary supply voltages generated from a pair of cross-coupled inverters. The cross-coupled inverters may implement a data storage latch with the moving supply voltages generated from the internal data storage nodes of the latch.