The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2023

Filed:

Nov. 05, 2021
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Yohei Sawada, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 27/02 (2006.01); G11C 11/419 (2006.01); G11C 11/412 (2006.01); H10B 10/00 (2023.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 11/412 (2013.01); H10B 10/12 (2023.02); H10B 10/18 (2023.02);
Abstract

A semiconductor device includes a main circuit and a peripheral circuit inputting/outputting a signal from/to the main circuit, the main circuit including: a memory cell array; a sense amplifier; a first output holding circuit holding the read data output from the sense amplifier; a second output holding circuit receiving the read data as its input output from the first output holding circuit; and a delay circuit outputting a delay signal for activating the second output holding circuit to be later than the first output holding circuit. The delay circuit includes an element applying a load capacitance to a wiring of the delay signal. A power-supply voltage being a first voltage is supplied to the memory cell array, the sense amplifier and the first output holding circuit. A power-supply voltage being a second voltage is supplied to the delay circuit, the second output holding circuit and the peripheral circuit.


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