The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2023
Filed:
Jul. 07, 2020
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventor:
Ankit Srivastava, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06N 3/065 (2023.01); H03M 1/46 (2006.01); G11C 11/419 (2006.01); G06N 3/04 (2023.01); G11C 11/412 (2006.01); G11C 11/54 (2006.01); G11C 27/02 (2006.01); G11C 7/16 (2006.01); H03M 1/38 (2006.01);
U.S. Cl.
CPC ...
G06N 3/065 (2023.01); G06F 7/5443 (2013.01); G06N 3/04 (2013.01); G11C 7/16 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01); G11C 11/54 (2013.01); G11C 27/026 (2013.01); H03M 1/466 (2013.01); H03M 1/38 (2013.01);
Abstract
A multiply-and-accumulate (MAC) circuit having a plurality of compute-in-memory bitcells is configured to multiply a plurality of stored weight bits with a plurality of input bits to provide a MAC output voltage. A successive approximation analog-to-digital converter includes a capacitive-digital-to-analog-converter (CDAC) configured to subtract a bias voltage from the MAC output voltage to provide a CDAC output voltage. A comparator compares the CDAC output voltage to a fixed reference voltage.