The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Sep. 29, 2021
Applicants:

Stmicroelectronics (Rousset) Sas, Rousset, FR;

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Inventors:

Philippe Boivin, Venelles, FR;

Jean Jacques Fagot, Rousset, FR;

Emmanuel Petitprez, Grenoble, FR;

Emeline Souchier, Saint-Ismier, FR;

Olivier Weber, Grenoble, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8222 (2006.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10B 63/32 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02);
Abstract

The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.


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