The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Sep. 30, 2021
Applicants:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Stmicroelectronics Design and Application S.r.o., Prague, CZ;

Inventors:

Alberto Iorio, Aosta, IT;

Maurizio Foresta, Aosta, IT;

Emilio Volpi, Charvensod, IT;

Jan Novotny, Tyn nad Vltavou, CZ;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/335 (2006.01); H02M 1/08 (2006.01); H02M 3/00 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33592 (2013.01); H02M 1/0058 (2021.05); H02M 3/01 (2021.05); H02M 1/08 (2013.01);
Abstract

A synchronous rectifier driver circuit is configured to drive a synchronous rectifier FET and includes a first terminal configured to be connected to a source terminal of the synchronous rectifier FET. A second terminal is configured to be connected to a drain terminal of the synchronous rectifier FET, and a third terminal is configured to be connected to a gate terminal of the synchronous rectifier FET. The synchronous rectifier driver circuit is configured to measure the voltage between the second terminal and the first terminal, and detect a switch-on instant in which the measured voltage reaches a first threshold value and a switch-off instant in which the measured voltage reaches a second threshold value. The synchronous rectifier driver circuit generates a drive signal between the third terminal and the first terminal as a function of the measured voltage.


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