The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Dec. 30, 2021
Applicants:

Michael Cieslak, Los Angeles, CA (US);

Jiayao Yu, Venice, CA (US);

Kai Chen, Manhattan Beach, CA (US);

Farnaz Azmoodeh, Venice, CA (US);

Michael David Marr, Monroe, WA (US);

Jun Huang, Beverly Hills, CA (US);

Zahra Ferdowsi, Marina del Rey, CA (US);

Inventors:

Michael Cieslak, Los Angeles, CA (US);

Jiayao Yu, Venice, CA (US);

Kai Chen, Manhattan Beach, CA (US);

Farnaz Azmoodeh, Venice, CA (US);

Michael David Marr, Monroe, WA (US);

Jun Huang, Beverly Hills, CA (US);

Zahra Ferdowsi, Marina del Rey, CA (US);

Assignee:

Snap Inc., Santa Monica, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 11/34 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 9/505 (2013.01); G06F 9/5094 (2013.01); G06F 11/3024 (2013.01); G06F 11/3433 (2013.01); G06F 2209/501 (2013.01); G06F 2209/508 (2013.01);
Abstract

Systems, devices, media, and methods are presented for throttling (i.e., adjusting) the workload of an application (e.g., number of task requests) in order to improve processor core usage within a heterogeneous multiprocessor system. When high-performance processing is beneficial to the application, the number of task requests may be increased in order to have high-performance processor cores within the heterogeneous multiprocessor system core processor perform the tasks. On the other hand, when high-performance processing is not beneficial, the number of task requests may be decreased in order to have low-performance processor cores within the heterogeneous multiprocessor system perform the tasks. Processor core usage is monitored, and the number of tasks being performed are adjusted to match the processor core usage to a target processor core usage for functions the application is performing.


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