The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Jan. 25, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Lakshmanan Balasubramanian, Bengaluru, IN;

Aswani Kumar Golla, Bengaluru, IN;

Venkatraman Ramakrishnan, Bengaluru, IN;

Sushmitha Tudiyadka Girijashankar, Sullia Taluk, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 1/26 (2006.01); G06F 30/38 (2020.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
G06F 1/266 (2013.01); G06F 30/38 (2020.01); H03K 3/037 (2013.01);
Abstract

A method for boundary port modelling that correctly handles back-to-back isolation intent, level shifter intent and voltage level association, by providing hard association of power domains to soft data objects, such as wires. The method includes identifying a boundary port in a detailed power intent (DPI) for a soft design object (SDO). A non-wire object is inserted in the SDO for the boundary port. In the DPI, a power domain of the boundary port is assigned to the non-wire object.


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