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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11812644 B1

PDFFull Text
Date of Patent:
Nov. 07, 2023

Filed:

Jan. 05, 2021

Display apparatus including conductive pattern in substrate and method of manufacturing the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Kiseong Seo, Yongin-si, KR;

Jekil Ryu, Yongin-si, KR;

Wonkyu Choe, Yongin-si, KR;

Jungho Choi, Yongin-si, KR;

Mugyeom Kim, Hwaseong-si, KR;

Changyong Jeong, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:

H.C. Park & Associates, PLC

Primary Examiner:

Maliheh Malek

Int. Cl.
CPC ...
H10K 59/131 (2023.01); H01L 27/12 (2006.01); H10K 59/12 (2023.01); H10K 77/10 (2023.01); H10K 50/14 (2023.01); H10K 71/80 (2023.01); H10K 102/00 (2023.01); H10K 50/00 (2023.01); H10K 50/842 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); H01L 27/1214 (2013.01); H10K 50/00 (2023.02); H10K 59/12 (2023.02); H10K 77/111 (2023.02); H01L 2924/12041 (2013.01); H01L 2924/12044 (2013.01); H10K 50/14 (2023.02); H10K 50/8426 (2023.02); H10K 59/1201 (2023.02); H10K 71/80 (2023.02); H10K 2102/311 (2023.02); Y02E 10/549 (2013.01);
Abstract

A display apparatus includes a display region and a peripheral region adjacent to the display region. The display apparatus further includes a first flexible substrate (FFS), a driving circuit (DC), a conductive pattern (CP), a conductive line, a light-emitting device, and a support substrate. The FFS includes a first surface and a second surface opposite the first surface. The second surface includes, in the peripheral region, a cavity extending into the FFS. The DC is on the first surface and includes at least one transistor. The CP is in the cavity and is partially exposed by the cavity. The conductive line electrically connects the CP to the DC. The light-emitting device is in the display region and is electrically connected to the DC. The support substrate is on the second surface. In a view normal to the second surface, the support substrate is spaced apart from the CP.

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