The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2023

Filed:

Jun. 16, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Sophia Friedler, Villach, AT;

Bernhard Goller, Villach, AT;

Iris Moder, Villach, AT;

Ingo Muri, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/465 (2006.01); H01L 21/8258 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0203 (2013.01); H01L 21/02019 (2013.01); H01L 21/465 (2013.01); H01L 21/8258 (2013.01);
Abstract

A method includes: in a semiconductor wafer having a first semiconductor layer and a second semiconductor layer adjoining the first semiconductor layer, forming a porous region extending from a front surface into the first semiconductor layer; and removing the porous region by an etching process, wherein a doping concentration of the second semiconductor layer is less than 10times a doping concentration of the first semiconductor layer and/or a doping type of the second semiconductor layer is complementary to a doping type of the first semiconductor layer, wherein forming the porous region comprises bringing in contact a porosifying agent with the front surface of the first semiconductor layer and applying a voltage between the first semiconductor layer and a first electrode that is in contact with the porosifying agent, wherein applying the voltage comprises applying the voltage between the first electrode and an edge region of the first semiconductor layer.


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