The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2023

Filed:

Jan. 15, 2021
Applicant:

Witricity Corporation, Watertown, MA (US);

Inventors:

Andre B. Kurs, Chestnut Hill, MA (US);

Milisav Danilovic, Watertown, MA (US);

Assignee:

WiTricity Corporation, Watertown, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B60L 53/12 (2019.01); H03H 7/40 (2006.01); H02J 50/12 (2016.01); H03H 11/28 (2006.01); H03K 5/1536 (2006.01); H03K 7/08 (2006.01); H03K 17/284 (2006.01);
U.S. Cl.
CPC ...
B60L 53/12 (2019.02); H02J 50/12 (2016.02); H03H 7/40 (2013.01); H03H 11/28 (2013.01); H03K 5/1536 (2013.01); H03K 7/08 (2013.01); H03K 17/284 (2013.01);
Abstract

Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.


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