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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11805635 B1

PDFFull Text
Date of Patent:
Oct. 31, 2023

Filed:

Aug. 13, 2020

Semiconductor memory device

Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Hiroaki Yamamoto, Yokohama, JP;

Shinichi Asou, Yokohama, JP;

Kenichi Kawabata, Chigasaki, JP;

Haruyuki Miyata, Ayase, JP;

Takahiro Shimokawa, Yokohama, JP;

Takaco Umezawa, Kamakura, JP;

Syunsuke Sasaki, Kamakura, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Amar Movva

Int. Cl.
CPC ...
H10B 10/00 (2023.01); G11C 11/417 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
H10B 10/12 (2023.02); G11C 11/412 (2013.01); G11C 11/417 (2013.01); H10B 10/18 (2023.02);
Abstract

According to one embodiment, a semiconductor memory device includes, on a substrate, a memory region and a peripheral circuit region in which an MOS transistor is formed. The MOS transistor includes a drain region and a source region disposed in a first direction parallel to a surface of the substrate. On a surface of the drain region, a drain electrode is formed to be connected with a contact plug. Further, on a surface of the source region, a source electrode is formed to be connected with a contact plug. When viewed in the first direction, the drain electrode has a region that does not overlap with the source electrode, and the source electrode has a region that does not overlap with the drain electrode.

Find Patent Forward Citations

Yamamoto, Hiroaki. (2023). Semiconductor memory device (U.S. Patent No. 11805635). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11805635

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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