The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2023
Filed:
Jan. 05, 2022
Samsung Electronics Co., Ltd., Suwon-si, KR;
Jaemin Choi, Suwon-si, KR;
Yonghun Kim, Hwaseong-si, KR;
Jinhyeok Baek, Busan, KR;
Yoochang Sung, Hwaseong-si, KR;
Changsik Yoo, Seoul, KR;
Jeongdon Ihm, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
An interface circuit includes: a buffer circuit configured to receive an input signal and to generate an output signal having a delay time, the delay time being determined based on a current level of a bias current and a voltage level of a power supply voltage; and a bias generation circuit configured to vary a voltage level of a bias control voltage so that the delay time is constant by compensating for a change in the voltage level of the power supply voltage, the bias generation circuit being further configured to provide the bias control voltage to the buffer circuit.