The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2023

Filed:

Sep. 07, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Eunhye Oh, Suwon-si, KR;

Jaehyeok Kim, Seoul, KR;

Yong Ki Lee, Suwon-si, KR;

Gapkyoung Kim, Suwon-si, KR;

Taewook Park, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/10 (2006.01); G11C 29/36 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/10 (2013.01); G11C 29/36 (2013.01); G11C 29/4401 (2013.01);
Abstract

A memory device includes a memory module and a BIST logic circuit. The BIST logic circuit includes; a pattern generator configured to generate first main data including a first portion, an error correction code (ECC) encoder configured to generate first parity data based on the first main data, and a parity control circuit configured to generate mask data based on the first parity data and the first main data, and generate first substituted parity data based on the mask data and the first parity data, wherein a pattern of the first substituted parity data is the same as a pattern of the first portion of the first main data.


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