The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2023
Filed:
Jun. 30, 2020
Amazon Technologies, Inc., Seattle, WA (US);
Paul Gilbert Meyer, Nashville, VI (US);
Thiam Khean Hah, Milpitas, CA (US);
Randy Renfu Huang, Morgan Hill, CA (US);
Ron Diamant, Santa Clara, CA (US);
Vignesh Vivekraja, Santa Clara, CA (US);
Amazon Technologies, Inc., Seattle, WA (US);
Abstract
A systolic array can implement an architecture tailored to perform matrix multiplications on constrained fine-grained sparse weight matrices. Each processing element in the systolic array may include a weight register configured to store a weight value, and a multiplexor configured to select a feature map (FMAP) input element from multiple FMAP input data buses based on metadata associated with the weight value. Each processing element may also include a multiplier configured to multiply the selected feature map input element with the weight value to generate a multiplication result, and an adder configured to add the multiplication result to a partial sum input to generate a partial sum output.