The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Jun. 30, 2022
Applicant:

Canaan Creative (Sh) Co., Ltd., Shanghai, CN;

Inventors:

Jieyao Liu, Beijing, CN;

Nangeng Zhang, Beijing, CN;

Jingjie Wu, Beijing, CN;

Shenghou Ma, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/02 (2006.01); H03K 3/0233 (2006.01); H03K 3/017 (2006.01); H03K 3/288 (2006.01); G06F 1/06 (2006.01); G06F 1/10 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0233 (2013.01); G06F 1/06 (2013.01); G06F 1/10 (2013.01); H03K 3/017 (2013.01); H03K 3/288 (2013.01); H03K 19/20 (2013.01);
Abstract

A clock generation circuit, a latch using same, and a computing device are provided. The clock generation circuit includes an input end, configured to input a pulse signal; a first output end, configured to output a first clock signal; a second output end, configured to output a second clock signal; and an input drive circuit, a latch circuit, an edge shaping circuit, a feedback delay circuit, and an output drive circuit, where the input drive circuit, the latch circuit, the edge shaping circuit, the feedback delay circuit, and the output drive circuit are sequentially connected between the input end and the first output end as well as the second output end in series. A clock pulse can be effectively shaped, the use of a clock buffer can be reduced, and the correctness and accuracy of data transmission and latching can be improved.


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