The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Sep. 27, 2021
Applicant:

Sony Group Corporation, Tokyo, JP;

Inventor:

Toshihiko Hayashi, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0232 (2014.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 27/1461 (2013.01); H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H01L 27/14623 (2013.01); H01L 27/14625 (2013.01); H01L 27/14634 (2013.01); H01L 27/14685 (2013.01); H01L 27/14645 (2013.01); H01L 2224/80194 (2013.01);
Abstract

Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.


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