The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Jul. 28, 2021
Applicant:

D-wave Systems Inc., Burnaby, CA;

Inventors:

Paul I. Bunyk, New Westminster, CA;

James King, Vancouver, CA;

Murray C. Thom, Vancouver, CA;

Mohammad H. Amin, Coquitlam, CA;

Anatoly Smirnov, Vancouver, CA;

Sheir Yarkoni, Vancouver, CA;

Trevor M. Lanting, Vancouver, CA;

Andrew D. King, Vancouver, CA;

Kelly T. R. Boothby, Coquitlam, CA;

Assignee:

1372934 B.C. LTD., Burnaby, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 10/00 (2022.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06N 10/00 (2019.01); G06F 11/0736 (2013.01); G06F 11/0751 (2013.01); G06F 11/0793 (2013.01);
Abstract

The systems, devices, articles, and methods described herein generally relate to analog computers, for example quantum processors comprising qubits, couplers, and, or cavities. Analog computers, for example quantum processor based computers, are the subject of various sources of error which can hinder operation, potentially reducing computational accuracy and speed. Sources of error can be broadly characterized, for example as i) a background susceptibility do to inherently characteristics of the circuitry design, ii) as an h/J ratio imbalance, iii) bit flip errors, iv) fidelity, and v) Anderson localization, and various combinations of the aforesaid.


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