The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2023
Filed:
Oct. 15, 2021
Meta Platforms Technologies, Llc, Menlo Park, CA (US);
Sridhar Gurumurthy Isukapalli Sharma, Palo Alto, CA (US);
Valerio Catalano, San Francisco, CA (US);
Meta Platforms Technologies, LLC, Menlo Park, CA (US);
Abstract
The disclosure is directed to techniques for dynamically managing memory in mixed mode cache and shared memory systems. For example, a system on a chip (SoC) comprises: a plurality of memories, including a first memory and a second memory, where each of the memories includes one or more cache lines; a first subsystem comprising a first compute element and the first memory; a second subsystem comprising a second compute element and the second memory; and a memory control unit of the SoC comprising processing circuitry and configured to: configure a shared memory with one or more cache lines of at least one of the plurality of memories; and flush, based on one or more tag control bits for the one or more cache lines of the shared memory, data from the shared memory to a backend storage separate from the SoC.