The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Dec. 17, 2021
Applicant:

Abb Schweiz Ag, Baden, CH;

Inventors:

John Andrew Trelford, Richardson, TX (US);

Robert Joseph Roessler, Wylie, TX (US);

Jose Daniel Rogers, Mesquite, TX (US);

Arturo Silva, Allen, TX (US);

Alok Lohia, Dallas, TX (US);

Assignee:

Acleap Power Inc., Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 1/11 (2006.01); H05K 3/00 (2006.01); H05K 3/42 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 1/116 (2013.01); H05K 1/0206 (2013.01); H05K 3/0035 (2013.01); H05K 3/0038 (2013.01); H05K 3/0047 (2013.01); H05K 3/421 (2013.01); H05K 1/184 (2013.01); H05K 3/429 (2013.01); H05K 2201/0979 (2013.01); H05K 2201/09518 (2013.01);
Abstract

In one aspect, a PCB is provided. The PCB includes at least one insulating layer, a blind slot, and at least one via. The at least on insulating layer includes a first surface and a second surface opposite the first surface. The blind slot is plated and formed in the at least one insulating layer, where the blind slot partially extends from the first surface to the second surface, and where the blind slot includes a conductive plating bonded along a major surface of the blind slot. The at least one via is electrically conductive and filled, where the at least one via is coupled with and extends between the conductive plating of the blind slot and the second surface of the at least one insulating layer.


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