The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Oct. 18, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Sahiti Priya C, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H03F 1/02 (2006.01); H03F 3/45 (2006.01); H03F 3/217 (2006.01); H03M 1/38 (2006.01); H03F 3/181 (2006.01);
U.S. Cl.
CPC ...
H03F 1/26 (2013.01); H03F 1/025 (2013.01); H03F 3/181 (2013.01); H03F 3/2175 (2013.01); H03F 3/45 (2013.01); H03M 1/38 (2013.01);
Abstract

A supply voltage conditioning circuit comprises a differential amplifier, a comparator, a sample and hold (S/H) circuit, and a delay circuit. The differential amplifier receives an input supply voltage and a reference voltage, and outputs a difference signal. The comparator receives the difference signal and a value representative of a noise margin, and outputs a control signal indicative of whether the difference signal is greater than the value representative of the noise margin. The S/H circuit samples the input supply voltage in response to the control signal indicating the difference signal is greater than the noise margin, and outputs a substantially noise free supply voltage. This allows the output supply voltage to track underlying changes in the input supply voltage but filter out noise in the input supply voltage. The delay circuit receives and delays the output supply voltage to generate the reference voltage.


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