The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Mar. 23, 2022
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shunpei Yamazaki, Setagaya, JP;

Yasuharu Hosaka, Tochigi, JP;

Satoru Idojiri, Tochigi, JP;

Kenichi Okazaki, Tochigi, JP;

Hiroki Adachi, Tochigi, JP;

Daisuke Kubota, Atsugi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/52 (2006.01); H01L 27/12 (2006.01); H01L 21/683 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10K 59/121 (2023.01);
U.S. Cl.
CPC ...
H01L 27/1266 (2013.01); H01L 21/6835 (2013.01); H01L 27/1218 (2013.01); H01L 27/1225 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 29/78603 (2013.01); H01L 29/78648 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68386 (2013.01); H10K 59/1213 (2023.02);
Abstract

A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 μm and less than or equal to 3 μm is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.


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