The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2023
Filed:
Dec. 07, 2022
Sharp Kabushiki Kaisha, Sakai, JP;
Tetsuo Kikuchi, Sakai, JP;
Hideki Kitagawa, Sakai, JP;
Hajime Imai, Sakai, JP;
Toshikatsu Itoh, Sakai, JP;
Masahiko Suzuki, Sakai, JP;
Teruyuki Ueda, Sakai, JP;
Kengo Hara, Sakai, JP;
Setsuji Nishimiya, Sakai, JP;
Tohru Daitoh, Sakai, JP;
SHARP KABUSHIKI KAISHA, Sakai, JP;
Abstract
According to an embodiment of the present invention, an active matrix substrate () includes a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate (), a first TFT (), and a second TFT (). The first TFT is supported by the substrate and disposed in the peripheral region. The second TFT is supported by the substrate and disposed in the display region. The first TFT includes a crystalline silicon semiconductor layer (), which is an active layer. The second TFT includes an oxide semiconductor layer (), which is an active layer. The first TFT and the second TFT each have a top-gate structure.