The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Dec. 01, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Byung Chang Yu, Yongin-si, KR;

Hyun Joon Kim, Yongin-si, KR;

Hae Min Kim, Yongin-si, KR;

Myung Hoon Park, Yongin-si, KR;

Dong Hoon Lee, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-Si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 3/3233 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/021 (2013.01);
Abstract

A pixel and a display device including the same are disclosed. The pixel includes a light emitting element, first through seventh transistors, and a first capacitor. The first transistor is connected between first and second nodes. The second transistor is connected between a data line and a fourth node and configured to be turned on by a first scan signal. The third transistor is connected between the first node and a third node and configured to be turned on by a second scan signal. The fourth transistor is connected between the fourth node and a third power line and configured to be turned on by a third scan signal. The fifth transistor is connected between the third node and the third power line and configured to be turned on by a fourth scan signal. The sixth transistor is connected between the first node and a fifth node and configured to be turned off by an emission control signal. The seventh transistor is connected between the second node and the second power line and configured to be turned off in response to the emission control signal. The first capacitor is connected between the third and fourth nodes.


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