The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Sep. 16, 2021
Applicant:

Openlight Photonics, Inc., Goleta, CA (US);

Inventors:

Gregory Alan Fish, Santa Barbara, CA (US);

Brian R. Koch, Brisbane, CA (US);

Assignee:

OpenLight Photonics, Inc., Goleta, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); G02B 6/12 (2006.01); G02B 6/122 (2006.01); G02B 6/132 (2006.01); G02B 6/136 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4224 (2013.01); G02B 6/12004 (2013.01); G02B 6/1221 (2013.01); G02B 6/132 (2013.01); G02B 6/136 (2013.01); G02B 6/4204 (2013.01); G02B 6/428 (2013.01); G02B 6/4219 (2013.01); G02B 6/4269 (2013.01); G02B 6/4232 (2013.01); Y10T 29/49117 (2015.01);
Abstract

Described herein are photonic systems and devices including a optical interface unit disposed on a bottom side of a photonic integrated circuit (PIC) to receive light from an emitter of the PIC. A top side of the PIC includes a flip-chip interface for electrically coupling the PIC to an organic substrate via the top side. An alignment feature corresponding to the emitter is formed with the emitter to be offset by a predetermined distance value; because the emitter and the alignment feature are formed using a shared processing operation, the offset (i.e., predetermined distance value) may be precise and consistent across similarly produced PICs. The PIC comprises a processing feature to image the alignment feature from the bottom side (e.g., a hole). A heat spreader layer surrounds the optical interface unit and is disposed on the bottom side of the PIC to spread heat from the PIC.


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