The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2023

Filed:

Jun. 29, 2022
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Nur Mohammad Baksh, Austin, TX (US);

Michael Q. Co, Austin, TX (US);

Vibhor Mittal, Austin, TX (US);

Kedar Karthykeyan, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/3185 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31727 (2013.01); G01R 31/318541 (2013.01); G01R 31/318552 (2013.01);
Abstract

A method includes generating a functional clock signal, a scan clock signal, and a delayed clock signal based on a control clock signal and a scan enable signal. The method includes precharging or predischarging a differential pair of nodes in a first latch using the delayed clock signal and a voltage on a first power supply node and controlling a second latch using the delayed clock signal. The method includes latching data input by the first latch using the functional clock signal in a functional mode of operation and latching scan data by the first latch using the scan clock signal in a scan mode of operation.


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