The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Apr. 27, 2021
Applicants:

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Ning Liu, Beijing, CN;

Jun Liu, Beijing, CN;

Wei Song, Beijing, CN;

Qinghe Wang, Beijing, CN;

Bin Zhou, Beijing, CN;

Liangchen Yan, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H10K 59/124 (2023.01); H10K 59/126 (2023.01); H10K 59/12 (2023.01);
U.S. Cl.
CPC ...
H10K 59/124 (2023.02); H10K 59/126 (2023.02); H10K 59/1201 (2023.02);
Abstract

An array substrate, a method for manufacturing the array substrate and a display device are provided. The array substrate includes: a base substrate, and a thin film transistor, a storage capacitor, and a lapping pattern for connecting the thin film transistor to the storage capacitor arranged on the base substrate; wherein the thin film transistor includes a semiconductor layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode and a drain electrode arranged sequentially in that order; the interlayer insulation layer includes at least two inorganic insulation layers and at least one organic insulation layer laminated one on another, and both a layer proximate to the base substrate and a layer distal to the base substrate in the interlayer insulation layer are the inorganic insulation layers.


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