The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2023
Filed:
Apr. 27, 2021
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Jin Ho Kim, Icheon-si, KR;
Tae Sung Park, Icheon-si, KR;
Sang Hyun Sung, Icheon-si, KR;
Sung Lae Oh, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11565 (2017.01); H01L 27/11519 (2017.01); H01L 27/11529 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/11573 (2017.01); H10B 43/10 (2023.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/41 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/10 (2023.02); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02);
Abstract
A semiconductor memory device includes a memory cell array disposed over a substrate extending in a first direction and a second direction intersecting with the first direction in a first semiconductor layer, and including a plurality of cell units and at least two via regions that are arranged in the second direction, wherein a width of each of the at least two via regions in the second direction is a multiple of a width of each of the plurality of cell units in the second direction.