The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2023
Filed:
Jun. 04, 2020
Nvidia Corporation, Santa Clara, CA (US);
Joohwan Kim, San Jose, CA (US);
Benjamin Boudaoud, Efland, NC (US);
Josef B. Spjut, Durham, NC (US);
Morgan S. McGuire, Waterloo, CA;
Seth P. Schneider, San Jose, CA (US);
Rouslan L. Dimitrov, Santa Clara, CA (US);
Lars Nordskog, Corte Madera, CA (US);
Cody J. Robson, San Jose, CA (US);
Sau Yan Keith Li, San Jose, CA (US);
Gerrit Ary Slavenburg, Hayward, CA (US);
Tom J. Verbeure, Sunnyvale, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
A display device for measuring the end-to-end latency of a computing system. The computing system includes an input device, a computing device, and the display device. The display device is directly connected with the input device and receives input data packets generated by the input device in response to received user input events. The display device passes the input packets to the computing device for graphics processing. The display device measures the end-to-end latency comprising the sum of three latencies. A first latency comprises an input delay of the input device. A second latency comprises an amount of time between generation of the input packet and a corresponding change in pixel values caused by the input event at the display device. A third latency comprises a display latency. The display device also displays latency information associated with the measured end-to-end latency.