The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Sep. 14, 2020
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Amit P. Apte, Austin, TX (US);

Ganesh Balakrishnan, Austin, TX (US);

Vydhyanathan Kalyanasundharam, Santa Clara, CA (US);

Kevin M. Lepak, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/128 (2016.01); G06F 12/0817 (2016.01); G06F 12/0831 (2016.01); G06F 12/0891 (2016.01);
U.S. Cl.
CPC ...
G06F 12/128 (2013.01); G06F 12/082 (2013.01); G06F 12/0824 (2013.01); G06F 12/0826 (2013.01); G06F 12/0833 (2013.01); G06F 12/0891 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/507 (2013.01); G06F 2212/62 (2013.01);
Abstract

Systems, apparatuses, and methods for implementing a speculative probe mechanism are disclosed. A system includes at least multiple processing nodes, a probe filter, and a coherent slave. The coherent slave includes an early probe cache to cache recent lookups to the probe filter. The early probe cache includes entries for regions of memory, wherein a region includes a plurality of cache lines. The coherent slave performs parallel lookups to the probe filter and the early probe cache responsive to receiving a memory request. An early probe is sent to a first processing node responsive to determining that a lookup to the early probe cache hits on a first entry identifying the first processing node as an owner of a first region targeted by the memory request and responsive to determining that a confidence indicator of the first entry is greater than a threshold.


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