Method to ensure message arrival before a message pointer

Abstract

Aspects of a storage device are provided that allows a controller to prevent message pointers from being stored in controller memory prior to associated messages due to race conditions, bus arbitration, or similar circumstances. The storage device may include hardware that routes order-sensitive transactions including messages to a first memory and order-sensitive transactions including message pointers to a second memory. The messages and message pointers may be provided from a first processor of the controller to a second processor of the controller. The hardware may hold delivery of each message pointer to the second memory until a delivery acknowledgement of an associated message is received from the first memory. The hardware may also route order-insensitive transactions including other instructions to a third memory different than the first and second memories without holding delivery. As a result, order-sensitive transactions may processed in the order received, without delaying processing of order-insensitive transactions.