The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Jan. 21, 2020
Applicants:

Avary Holding (Shenzhen) Co., Limited., Shenzhen, CN;

Hongqisheng Precision Electronics (Qinhuangdao) Co., Ltd., Qinhuangdao, CN;

Inventors:

Hsiao-Ting Hsu, New Taipei, TW;

Ming-Jaan Ho, New Taipei, TW;

Fu-Yun Shen, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/30 (2006.01); H05K 1/03 (2006.01); H05K 1/09 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H05K 3/306 (2013.01); H05K 1/0353 (2013.01); H05K 1/092 (2013.01); H05K 1/185 (2013.01); H05K 2201/0141 (2013.01); H05K 2201/0145 (2013.01);
Abstract

A method for manufacturing a circuit board () includes: providing a first single-sided circuit substrate () including an insulating base layer () and a circuit layer (); forming first conductive posts () electrically connected to the circuit layer () in the insulating base layer () to obtain a second single-sided circuit substrate (); providing a first adhesive layer (), forming second conductive posts (); providing one second single-sided circuit substrate (), defining a receiving groove () to obtain a third single-sided circuit substrate (); providing another first single-sided circuit substrate (), mounting an electronic component () on the circuit layer () to obtain a surface mounted circuit substrate (); stacking the first single-sided circuit substrate (), the first adhesive layer (), the second single-sided circuit substrate (), at least one of the third single-sided circuit substrate (), and the surface mounted circuit substrate () in that order; pressing the intermediate body ().


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