The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2023
Filed:
Jan. 13, 2022
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Sung Hyun Song, Icheon-si, KR;
Young Suk Seo, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H03L 7/085 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0818 (2013.01); H03L 7/085 (2013.01); H03L 7/0816 (2013.01);
Abstract
A delay circuit including a first output clock generation circuit and a second output clock generation circuit. The first output clock generation circuit generates a first output clock signal by mixing phases of a first clock signal and a second clock signal based on an (n+1)-th generated delay control signal. The second output clock generation circuit generates a second output clock signal by mixing the phases of the first and second clock signals based on both an n-th generated delay control signal and the (n+1)-th generated delay control signal.