The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Aug. 27, 2021
Applicant:

Imec Vzw, Leuven, BE;

Inventor:

Zheng Tao, Heverlee, BE;

Assignee:

Imec VZW, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/74 (2006.01); H01L 21/84 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 21/743 (2013.01); H01L 21/845 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01);
Abstract

A method is provided for forming a semiconductor product including providing a substrate comprising a buried power rail; forming a sacrificial plug at a contact surface on the buried power rail; applying a front-end-of-line module for forming devices in the semiconductor substrate; providing a Via, through layers applied by the front-end-module, which joins the sacrificial plug on the buried power rail; selectively removing the sacrificial plug thereby obtaining a cavity above the buried power rail; filling the cavity with a metal to electrically connect the devices with the buried power rail, wherein the sacrificial plug is formed such that the contact surface area is larger than an area of a cross-section of the Via parallel with the contact surface.


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