The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Dec. 01, 2022
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sudhakar Surendran, Bangalore, IN;

Venkatraman Ramakrishnan, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/327 (2020.01); G06F 30/367 (2020.01); G06F 30/398 (2020.01); G06F 119/02 (2020.01); G06F 117/04 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/327 (2020.01); G06F 30/367 (2020.01); G06F 30/398 (2020.01); G06F 2117/04 (2020.01); G06F 2119/02 (2020.01);
Abstract

Methods, apparatus, systems and articles of manufacture are disclosed to simulate metastability for circuit design verification. An example apparatus includes an input handler to receive circuit design data indicative of a circuit design, a circuit modeler to generate a simulation model based on the circuit design data, a simulator to simulate operation of the circuit design based on the simulation model, a metastability injector to insert metastability logic into the simulation model during the simulation, and a metastability controller to control the metastability logic during the simulation.


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