The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2023

Filed:

Sep. 01, 2022
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Erhan Hancioglu, Bothell, WA (US);

Eashwar Thiagarajan, Bothell, WA (US);

Eric Mann, Issaquah, WA (US);

Harold Kutz, Edmonds, WA (US);

Vaibhav Ramamoorthy, Bothell, WA (US);

Rajiv Singh, Bothell, WA (US);

Amsby Richardson, Jr., Lynnwood, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/38 (2006.01); H03F 3/387 (2006.01); H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
H03F 3/387 (2013.01); H03M 3/458 (2013.01); H03F 1/02 (2013.01); H03F 2200/171 (2013.01); H03F 2200/331 (2013.01); H03F 2200/375 (2013.01);
Abstract

An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.


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