The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2023
Filed:
Jan. 03, 2022
Skyworks Solutions, Inc., Irvine, CA (US);
Raghunandan K. Ranganathan, Austin, TX (US);
Kannanthodath V. Jayakumar, Austin, TX (US);
Srisai R. Seethamraju, Nashua, NH (US);
Skyworks Solutions, Inc., Irvine, CA (US);
Abstract
A method for estimating jitter of a clock-signal-under-test includes generating a phase-adjusted clock signal based on an input clock signal and a feedback clock signal using a frequency-divided clock signal. The method includes generating N digital time codes for each phase adjustment of P phase adjustments of the phase-adjusted clock signal using a reference clock signal. Each digital time code of the N digital time codes corresponds to a first edge of a clock signal based on the phase-adjusted clock signal. P is a first integer greater than zero and N is a second integer greater than zero. The method includes generating a jitter estimate using an estimated standard deviation of a distribution of edges of the clock signal based on the N digital time codes for each of the P phase adjustments.