The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2023

Filed:

Apr. 14, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jun So Pak, Seongnam-si, KR;

Junghwa Kim, Seoul, KR;

Heeseok Lee, Suwon-si, KR;

Moonseob Jeong, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/24 (2013.01); H01L 23/49811 (2013.01); H01L 24/20 (2013.01); H01L 2224/2101 (2013.01); H01L 2224/214 (2013.01); H01L 2224/215 (2013.01); H01L 2224/24225 (2013.01); H01L 2924/01022 (2013.01); H01L 2924/01029 (2013.01);
Abstract

A semiconductor package may include a semiconductor chip including a chip pad, a redistribution structure including a redistribution insulation layer on the semiconductor chip and first redistribution patterns on a surface of the redistribution insulation layer, a passivation layer covering the first redistribution patterns, an UBM pattern on the passivation layer and extending into an opening of the passivation layer, a second redistribution pattern on the UBM pattern, conductive pillars on the second redistribution pattern, and a package connection terminal on the conductive pillars. The opening in the passivation layer may vertically overlap a portion of each of the first redistribution patterns. The second redistribution pattern may connect some of the first redistribution patterns to each other. Some of the conductive pillars may be connected to one another through the second redistribution pattern. The first redistribution patterns may be connected to the chip pad.


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