The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2023

Filed:

Jul. 12, 2021
Applicant:

Emc Ip Holding Company Llc, Hopkinton, MA (US);

Inventors:

Steven Soumpholphakdy, Chicago, IL (US);

Daniel Richard Thyken, Anoka, MN (US);

Bradley Brian Bushard, Chaska, MN (US);

Assignee:

EMC IP HOLDING COMPANY LLC, Hopkinton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/50 (2006.01); G06F 1/3203 (2019.01); G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50004 (2013.01); G06F 1/3203 (2013.01); G11C 14/00 (2013.01); G11C 2029/5004 (2013.01);
Abstract

A system can validate multiple nonvolatile random-access memory (NVRAM) devices in parallel. The system can concurrently write a first data to a first volatile memory of a first NVRAM device and a second NVRAM device. The system can modify a first electrical power source that provides an electrical power output that is received by the first NVRAM device and is received by the second NVRAM device to modify a voltage of the electrical power from a first value to a second value to initiate the first NVRAM device and the second NVRAM device to respectively perform a vault. The system can reset the first electrical power source, causing the first NVRAM device and the second NVRAM device to reset. The system can verify whether the first NVRAM device and the second NVRAM device respectively store the first data in volatile memory subsequent to performing the resetting.


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