The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2023

Filed:

May. 18, 2022
Applicant:

Stmicroelectronics Application Gmbh, Aschheim-Dornach, DE;

Inventors:

Rolf Nandlinger, Herrsching, DE;

Roberto Colombo, Munich, DE;

Assignee:

STMicroelectronics Application GMBH, Aschheim-Dornach, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 13/42 (2006.01); G06F 21/60 (2013.01); G06F 21/72 (2013.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 9/30105 (2013.01); G06F 9/3877 (2013.01); G06F 13/4282 (2013.01); G06F 21/602 (2013.01); G06F 21/72 (2013.01);
Abstract

In an embodiment, a processing system comprises a microprocessor programmable via software instructions, a memory controller configured to be coupled to a memory, a communication system coupling the microprocessors to the memory controller, a cryptographic co-processor and a first communication interface. The processing system also comprises first and second configurable DMA channels. In a first configuration, the first DMA channel is configured to transfer data from the memory to the cryptographic co-processor, and the second DMA channel is configured to transfer the encrypted data via two loops from the cryptographic co-processor to the first communication interface. In a second configuration, the second DMA channel is configured to transfer received data via two loops from the first communication interface to the cryptographic co-processor, and the first DMA channel is configured to transfer the decrypted data from the cryptographic co-processor to the memory.


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