The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2023
Filed:
May. 10, 2021
Sandisk Technologies Llc, Addison, TX (US);
Fumiaki Toyama, Cupertino, CA (US);
Jee-Yeon Kim, San Jose, CA (US);
SANDISK TECHNOLOGIES LLC, Addison, TX (US);
Abstract
A bonded assembly of a memory die and a logic die is provided. The memory die includes a memory array, a plurality of bit lines, and memory-side bit-line-connection bonding pads. The logic die includes sense amplifiers located in a sense amplifier region, and logic-side bit-line-connection bonding pads located within the sense amplifier region and bonded to a respective one of the memory-side bit-line-connection bonding pads. The sense amplifier region has an areal overlap with a respective first subset the plurality of bit lines in a plan view, while a second subset of the plurality of bit lines does not have an areal overlap with the sense amplifier region in the plan view.