The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Aug. 02, 2021
Applicant:

Realtek Semiconductor Corp., HsinChu, TW;

Inventors:

Tai-Yi Huang, HsinChu, TW;

Ming-Dao Chen, HsinChu, TW;

Yu-Yi Lin, HsinChu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 45/00 (2022.01); G06F 15/173 (2006.01); H04L 45/58 (2022.01); H04L 45/60 (2022.01); H04L 49/113 (2022.01); H04L 49/112 (2022.01); H04L 45/037 (2022.01);
U.S. Cl.
CPC ...
H04L 45/583 (2013.01); H04L 45/037 (2022.05); H04L 45/60 (2013.01); H04L 49/112 (2022.05); H04L 49/113 (2022.05);
Abstract

A method used in a stacking/stackable switch unit includes: providing a plurality of signal ports of the stacking/stackable switch unit, the signal ports having at least one master/slave control port corresponding to at least one operation function of the stacking/stackable switch unit; during a boot-up procedure, automatically determining whether the stacking/stackable switch unit is a master or a slave according to at least one signal level of the at least one master/slave control port and/or content of at least one bit obtained from the at least one master/slave control port.


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