The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Aug. 13, 2021
Applicants:

Derek L. Knee, Fort Collins, CO (US);

Mark B. Ketchen, Hadley, MA (US);

Randall M. Burnett, Catonsville, MD (US);

Inventors:

Derek L. Knee, Fort Collins, CO (US);

Mark B. Ketchen, Hadley, MA (US);

Randall M. Burnett, Catonsville, MD (US);

Assignee:

NORTHROP GRUMMAN SYSTEMS CORPORATION, Falls Church, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 7/12 (2006.01); H03M 5/14 (2006.01); H03K 19/003 (2006.01); H03M 5/02 (2006.01); H03K 19/195 (2006.01);
U.S. Cl.
CPC ...
H03M 5/145 (2013.01); H03K 19/00315 (2013.01); H03K 19/003 (2013.01); H03K 19/195 (2013.01); H03M 5/02 (2013.01); H03M 5/14 (2013.01);
Abstract

Edge-sensitive, state-based single flux quantum (SFQ) based circuitry and related methods convert return-to-zero (RZ) or non-return-to-zero (NRZ) encoded SFQ-pulse-based signals to bilevel NRZ phase signals that can subsequently be converted to bilevel voltage signals by an output amplifier (OA). The SFQ-based circuitry can be integrated with a current amplification stage of a driver that can be coupled to a stage of the OA. The SFQ-based circuitry can be made to be compatible with RQL-encoded input signals that can be either RZ or NRZ. The SFQ-based circuitry can thus be compatible with both wave-pipelined (WPL) and phase-mode (PML) RQL circuitry. Because the SFQ-based circuitry and related methods are edge-sensitive and state-based, they can function at system clock rates in excess of 1 GHz with reduced glitches and improved bit error rates as compared to other superconducting RZ-NRZ conversion circuitry and methods.


Find Patent Forward Citations

Loading…