The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Aug. 31, 2021
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Marcella Carissimi, Treviolo, IT;

Marco Pasotti, Travaco′ Siccomario, IT;

Roberto Antonio Canegallo, Rimini, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); G06N 3/02 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0026 (2013.01); G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0004 (2013.01); G11C 13/0038 (2013.01); G06N 3/02 (2013.01);
Abstract

An embodiment memory device comprises a plurality of memory cells, each exhibiting a transconductance depending on a value of a stored bit, a plurality of bit lines associated with respective groups of memory cells, each bit line configured to flow a respective electric current indicative of the bit stored in a selected memory cell of the respective group of memory cells, and a computing circuit providing an output electric quantity indicative of a linear combination of a plurality of input electric quantities. The computing circuit comprises a biasing stage configured to bias each bit line with a respective input electric quantity, the electric current flowing through each bit line based on a product of the respective input electric quantity and the transconductance of the selected memory cell, and a combining stage for combining the electric currents flowing through the plurality of bit lines thereby obtaining the output electric quantity.


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