The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Sep. 08, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Seong Min Wang, Yongin-si, KR;

Young In Hwang, Yongin-si, KR;

Jin Woo Park, Yongin-si, KR;

Yong Ho Yang, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-Si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); H01L 29/786 (2006.01); H10K 59/131 (2023.01); H01L 27/12 (2006.01); G09G 3/3258 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); H01L 29/78648 (2013.01); H10K 59/131 (2023.02); G09G 3/3258 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0297 (2013.01); G09G 2320/0247 (2013.01); H01L 27/124 (2013.01);
Abstract

A display device may include a first pixel coupled to an emission control line, and an emission control stage for selectively coupling the emission control line to a first or second supply voltage line. The emission control stage may include: a first emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the emission control line, and a main gate electrode coupled to a first node; a second emission control transistor including a first electrode coupled to the emission control line, a second electrode coupled to the second supply voltage line, and a main gate electrode coupled to a second node; and a third emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the first node, a main gate electrode coupled to the second node, and a sub-gate electrode.


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