Computing circuitry for configuration and operation of cells and arrays comprising memristor elements

Abstract

This application relates to methods and apparatus for computing, especially to circuitry for performing computing, at least partly, in the analogue domain. The circuitry () comprises a plurality of memory cells (), each memory cell having first and second paths between an electrode () for receiving an input current and respective positive and negative electrodes () for outputting a differential-current output. Memristors () are located in the first and second paths. The memory cells are configured into sets () of memory cells, the memory cells of each said set being connected so as to provide a differential current set output that corresponds to a combination of the cell outputs of all of the memory cells of that set. For each set, at least some of the memory cells of that set are configured to receive a different input current to other memory cells of that set.