The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Aug. 31, 2021
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Rohit K. Gupta, Santa Clara, CA (US);

Rohit Natarajan, Sunnyvale, CA (US);

Jurgen M. Schulz, Pleasanton, CA (US);

Harshavardhan Kaushikkar, Santa Clara, CA (US);

Connie W. Cheung, Sunnyvale, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0871 (2016.01); G06F 13/16 (2006.01); G06F 12/02 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0871 (2013.01); G06F 3/0607 (2013.01); G06F 3/067 (2013.01); G06F 3/0664 (2013.01); G06F 12/0238 (2013.01); G06F 13/1673 (2013.01);
Abstract

A configurable interface circuit is disclosed. An integrated circuit (IC) having a particular configuration. The IC includes a memory system and a communication fabric coupled to the memory system. The IC further includes a plurality of agent circuits configured to make requests to the memory system that are in a first format that is not specific to the particular configuration of the IC. A plurality of interface circuits is coupled between corresponding ones of the plurality of agent circuits and the communication fabric. A given one of the plurality of interface circuits is configured to receive a request to the memory system in the first format and output the request in a second format that is specific to the particular configuration of the IC.


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