The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 12, 2023
Filed:
Sep. 19, 2018
Applicant:
Wisconsin Alumni Research Foundation, Madison, WI (US);
Inventors:
Hao Wang, Madison, WI (US);
Nam Sung Kim, Middleton, WI (US);
Assignee:
Wisconsin Alumni Research Foundation, Madison, WI (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 13/16 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 3/0635 (2013.01); G06F 13/16 (2013.01); G06F 13/161 (2013.01); G06F 13/1663 (2013.01); G06F 13/1684 (2013.01); G06F 13/40 (2013.01); G06F 13/4018 (2013.01); G06F 13/42 (2013.01); G06F 13/4234 (2013.01); G06F 13/4243 (2013.01); G06F 2213/0038 (2013.01); G06F 2213/0042 (2013.01); G06F 2213/0064 (2013.01);
Abstract
A computer architecture provides both a parallel memory bus and serial memory bus between a processor system and memory. Latency-tolerant memory access requests are steered to the serial memory bus which operates to increase the available memory bus bandwidth on the parallel memory. The invention also provides integrated circuit computer memory suitable for this application.