The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Sep. 22, 2021
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Siva Charan Nimmagadda, Nellore, IN;

Xiaobao Wang, Cupertino, CA (US);

Vinit Shah, Cupertino, CA (US);

Sabarathnam Ekambaram, Secunderabad, IN;

Hari Bilash Dubey, Hyderabad, IN;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/156 (2006.01); H03K 5/134 (2014.01); H03K 5/135 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1565 (2013.01); G11C 7/222 (2013.01); H03K 5/134 (2014.07); H03K 5/135 (2013.01);
Abstract

Examples describe a duty cycle correction circuit for correcting duty cycle distortion from memory. One example is an integrated circuit for correcting an input clock signal. The integrated circuit includes a first leg circuit and a second leg circuit. The first leg circuit and the second leg circuit both comprise a charging circuit and a discharging circuit. Each charging circuit comprises a first plurality of transistors and each discharging circuit comprises a second plurality of transistors. The charging circuit is coupled to the discharging circuit in series. A number of transistors of the first plurality of transistors in the first leg circuit is different from a number of transistors of the first plurality of transistors in the second leg circuit.


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