The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 2023
Filed:
Jan. 06, 2017
Disruptive Technologies Research As, Blomsterdalen, NO;
Bjørnar Hernes, Trondheim, NO;
Abstract
A clock delay circuit is configured to generate a delayed clock signal based on an input clock signal, the delayed clock signal delayed by a delay time (T). The circuit includes a current mirror configured to generate starved currents based on the reference current, a plurality of inverters, and a Schmitt trigger configured to generate an output signal in response to the input clock signal, wherein the Schmitt trigger output signal increases from a low signal to a high signal over a period (T) correlated with T. Some inverters and the Schmitt trigger are configured to be current starved when the input clock signal is high and are configured to be shorted to ground and the reference current when the input clock signal is low. Tis based on Tand Tis based on C, N, V, and a supply voltage.