The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Jul. 29, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Dae-Sik Moon, Suwon-si, KR;

Gil-Hoon Cha, Hwaseong-si, KR;

Ki-Seok Oh, Seoul, KR;

Chang-Kyo Lee, Seoul, KR;

Yeon-Kyu Choi, Seoul, KR;

Jung-Hwan Choi, Hwaseong-si, KR;

Kyung-Soo Ha, Hwaseong-si, KR;

Seok-Hun Hyun, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/4076 (2006.01); G11C 11/409 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 3/0604 (2013.01); G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 7/222 (2013.01); G11C 11/409 (2013.01);
Abstract

A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.


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